Synthesis and Backend Engineer

Stockholm, SE
den 16 september 2021
den 17 oktober 2021
As the tech firm that created the mobile world, and with more than 54,000 patents to our name, we've made it our business to make a mark. When joining our team at Ericsson you are empowered to learn, lead and perform at your best, shaping the future of technology. This is a place where you're welcomed as your own perfectly unique self, and celebrated for the skills, talent, and perspective you bring to the team. Are you in?

Come, and be where it begins.

Our Phenomenal Opportunity

We are looking for Backend and Synthesis Engineers for Digital ASICs in Stockholm.

We drive the ASIC technology that drives the leading-edge mobile telecommunication systems that are crafting the 5G world.

Our ASIC Design department in Kista is responsible for Digital ASIC development for all existing and future mobile standards including 5G. This is done in close partnership with internal and external partners such as standardization teams and market leading vendors. We work with state-of-the-art technologies, tools and methodologies.

We desire experienced, creative and innovative engineers to join our outstanding team as we deliver sophisticated SoC solutions for tomorrow's needs. You will be part of a dynamic department where there are opportunities to learn, try new roles, and take on new responsibilities.

As a part of our skilled ASIC Top Level Integration and Backend Team,

You will

  • Work with IP teams to understand the design and its requirements to develop the top-level floorplan
  • Perform logic synthesis and logic equivalence checks
  • Generate timing constraints and drive timing closure
  • Collaborate with system architects and IP developers to solve design issues caused by physical limitations on the design
  • Work closely with our Silicon and IP vendors regarding technology issues, power reduction, and timing completion
  • Develop and maintain STA and synthesis methodology and flows
  • Report to Line Manager - Backend and Integration

To be successful in the role you must have

  • MSc (preferred) or BSc in Electrical Engineering, Computer Science, or equivalent education
  • 3+ years' hands on experience in ASIC timing constraints generation and timing closure
  • 3+ years' experience in Primetime STA tool
  • 2+ years' hands-on experience in logic synthesis (Design Compiler) and formal equivalence checking
  • Experience with UNIX/Linux
  • Communication and presentation skills in English
  • Quality-consciousness

Personal qualifications

We are seeking: Self-motivated, results oriented designers with a proven record as a top performer in ASIC design; Problem solvers that thrive on big challenges; Innately unsatisfied engineers constantly looking for ways to improve existing systems, methods, and workflows; Collaborators who are great teammates and enjoy helping others.

Travels may be needed but not required on a frequent basis.

We welcome you to apply!

What´s in it for you?

Here at Ericsson, our culture is built on over a century of courageous decisions. With us, you will no longer be dreaming of what the future holds - you will be redefining it. You won't develop for the status quo, but will build what replaces it. Joining us is a way to move your career in any direction you want; with hundreds of career opportunities in locations all over the world, in a place where co-creation and collaboration are embedded into the walls. You will find yourself in a speak-up environment where empathy and humanness serve as cornerstones for how we work, and where work-life balance is a priority. Welcome to an inclusive, global company where your opportunity to make an impact is endless.

What happens once you apply?

To prepare yourself for next steps, please explore here:

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

What happens once you apply?

Please enclose your CV in English.

To prepare yourself for next steps, please explore here:

Location: Kista, Stockholm, Sweden.

Last application date: 11.10.2021.

Due to the GDPR we cannot accept applications sent to email please apply with your CV and cover letter through the system.

In case of questions please contact the recruiter:Sara Andersson at

You will report to Line Manager of Digital ASIC and FPGA at Business Area Networks.

Curious to know more about the life at Ericsson? Meet some of your future colleagues and watch our People film

Do you believe that an organization fostering an environment of cooperation and collaboration to execute with speed creates better business value? Do you value a culture of humanness, where fact based decisions are important and our people are encouraged to speak up? Do you believe that diverse, inclusive teams drive performance and innovation? At Ericsson, we do.

We provide equal employment opportunities without regard to race, color, gender, sexual orientation, transgender status, gender identity and/or expression, marital status, pregnancy, parental status, religion, political opinion, nationality, ethnic background, social origin, social status, indigenous status, disability, age, union membership or employee representation and any other characteristic protected by local law or Ericsson's Code of Business Ethics.

Primary country and city: Sweden (SE) || || Stockholm || [[mfield2]]

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